1. Field of the Invention
The present invention relates to a technique of generating sinusoidal waves using digital circuits, which is specially adapted for generating telephone ring tones or for use in DTMF (Dual Tone, Multifrequency) tone dialers.
2. Description of the Related Art
A conventional digital sine-wave generating circuit is arranged as shown in FIG. 1. In the figure, 1 denotes a counter, 2 denotes a latch, 3 denotes a read-only memory (hereinafter abbreviated to ROM), and 4 denotes a digital-to-analog (D/A) converter.
The digital circuit is provided with the ROM 3 as means of generating sinusoidal waves. In the ROM 3 data samples of sinusoidal waves have been stored previously. Thus, changing the ROM address by increments of a given value to read data samples from the ROM enables a user to obtain a sinusoidal wave of a given frequency.
FIG. 3 shows a manner in which a sinusoidal wave of a given frequency is constructed from data samples read from the ROM 3. The upper portion a of the figure indicates data which has been stored in the ROM 3 previously. That is, of data obtained by sampling a sinusoidal wave, N pieces of data from k=0 to k=N-1 (one point indicates a piece of data) have been stored in the ROM previously. If the data is read regularly at intervals of n (for example, every three points), then the ROM outputs will provide such a sinusoidal wave as shown in the lower portion b of FIG. 3, which has a given frequency f represented by equation (1). EQU f=(n/N).times.fs (1)
where fs is the sampling rate.
The counter 1 is used to read the contents of the ROM regularly at intervals of n.
FIG. 2 is a timing diagram of signals shown in FIG. 1.
First, a reset signal b is set low, so that the counter 1 is reset. Upon receipt of a latch pulse c after the reset signal b has been set high, the latch 2 outputs the initial value 0 of the counter 1, which is applied to address inputs of the ROM 3.
Next, upon receipt of a number n (for example, three) of clocks a the counter 1 advances by n. Subsequently, when another latch pulse c is applied, the ROM address e is increased by n.
Thus, repeating the application of clocks to the counter and the latch pulses to the latch allows the ROM address to be changed by increments of n. In response to the application of ROM outputs g thus read out of the ROM 3 the D/A converter 4 provides such a sinusoidal wave as described above.
In FIG. 2, Tc stands for the period of clocks input to the counter, and Ts stands for the sampling interval (Ts=1/fs).
However, the conventional digital circuit has the following three problems.
(a) It can generate only sinusoidal waves whose frequencies are an integral multiple of fs/N [Hz]. PA1 (b) To make the frequency spacing fs/N narrower, a ROM of a larger capacity is required, which will result in an increase in the area occupied by the circuit. PA1 (c) The counter needs a high-frequency clock signal. PA1 n=N.times.f/fs=2,000 PA1 Tc.ltoreq.Ts/n fc.gtoreq.fs.times.n PA1 fc.gtoreq.8[kHz].times.2,000=16[MHz]
That is, as can be seen from equation (1), the frequency of a sinusoidal wave generated is (n/N).times.fs [Hz]. However, since N and fs are each a constant, the frequency is determined by the value of n (1.ltoreq.n&lt;N/2). Therefore, the frequency can only take discrete values of n.times.fs/N.
That is, since the frequency of a sinusoidal signal is an integral multiple of fs/N, the precision of the frequency setting is proportional to the number N of the sampling points (the more N increases, the more the frequency spacing, fs/N, decreases). To set the frequency by increments of 1 Hz when the sampling rate fs is 8 kHz, the value of N will be 8,000 since fs/N=1[Hz]. Thus, an 8K-word ROM will be needed.
That is, since the value of n that determines the frequency of a sinusoidal signal is set by the number of clocks to the counter, it is required that the clock period Tc and the sampling period Ts be related by EQU Tc.times.n.ltoreq.Ts
In order to generate a sinusoidal wave of, say, f=2[kHz] when fs=8[kHz] and N=8,000, it is required that the clock frequency fc be
Thus the conventional digital sine-wave generating circuit suffers from the disadvantages that the frequency of a sinusoidal signal is an integral multiple of fs/N, a large-capacity ROM is required to narrow the frequency spacing, and the counter clock signal is required to be high in frequency.